FEILIDI-A3P030-QNG48I

Manufacturer:

Microchip Technology

Product Number:

FEILIDI-A3P030-QNG48I

Description:

<strong>Features and Benefits</strong><p><strong>High Capacity</strong></p><p>• 15 K to 1 M System Gates</p><p>• Up to 144 Kbits of True Dual-Port

Datasheet:

A3P030-QNG48I

Description:

<strong>Features and Benefits</strong><p><strong>High Capacity</strong></p><p>• 15 K to 1 M System Gates</p><p>• Up to 144 Kbits of True Dual-Port SRAM</p><p>• Up to 300 User I/Os</p><p><strong>Reprogrammable Flash Technology</strong></p><p>• 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS</p><p>Process</p><p>• Instant On Level 0 Support</p><p>• Single-Chip Solution</p><p>• Retains Programmed Design when Powered Off</p><p><strong>High Performance</strong></p><p>• 350 MHz System Performance</p><p>• 3.3 V, 66 MHz 64-Bit PCI†</p><p><strong>In-System Programming (ISP) and Security</strong></p><p>• Segmented, Hierarchical Routing and Clock Structure</p><p><strong>Advanced I/O</strong></p><p>• 700 Mbps DDR, LVDS-Capable I/Os (A3P250 and above)</p><p>• 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation</p><p>• Wide Range Power Supply Voltage Support per JESD8-B,</p><p><strong>Allowing I/Os to Operate from 2.7 V to 3.6 V</strong></p><p>• Bank-Selectable I/O Voltages—up to 4 Banks per Chip</p><p>• Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V /</p><p>2.5 V / 1.8 V / 1.5 V, 3.3 V PCI / 3.3 V PCI-X† and LVCMOS</p><p>2.5 V / 5.0 V Input</p><p>• Differential I/O Standards: LVPECL, LVDS, B-LVDS, and</p><p><strong>M-LVDS (A3P250 and above)</strong></p><p>• I/O Registers on Input, Output, and Enable Paths</p><p>• Hot-Swappable and Cold Sparing I/Os‡</p><p>• Programmable Output Slew Rate† and Drive Strength</p><p>• Weak Pull-Up/-Down</p><p>• IEEE 1149.1 (JTAG) Boundary Scan Test</p><p>• Pin-Compatible Packages across the ProASIC3 Family</p><p>Clock Conditioning Circuit (CCC) and PLL†</p><p>• Six CCC Blocks, One with an Integrated PLL</p><p>• Configurable Phase-Shift, Multiply/Divide, Delay Capabilities</p><p>and External Feedback</p><p>• Wide Input Frequency Range (1.5 MHz to 350 MHz)</p><p><strong>Embedded Memory†</strong></p><p>• 1 Kbit of FlashROM User Nonvolatile Memory</p><p>• SRAMs and FIFOs with Variable-Aspect-Ratio 4,608-Bit RAM</p><p>Blocks (×1, ×2, ×4, ×9, and ×18 organizations)†</p><p>• True Dual-Port SRAM (except ×18)</p><p>ARM Processor Support in ProASIC3 FPGAs</p><p>• M1 ProASIC3 Devices—ARM®Cortex®-M1 Soft Processor</p><p>Available with or without Debug</p>